The present disclosure relates generally to a system for accessing and storing data, and more specifically, to a system for storing a system-absolute address (SAA) in a first level translation look-aside buffer (TLB) located on a central processor.
In some situations, it may be necessary for a central processor to compute a system-absolute address (SAA) based on a given virtual address (VA). The SAA may be needed, for example, if the SAA is provided to an accelerator (e.g., a cryptographic accelerator or a data movement accelerator) by the central processor.
In one known approach, the SAA is computed using a translation unit (XU). Specifically, the central processor may send a request to the XU with a perform translator operation (PXLO) instruction. The XU may then perform the translation requested, or look up the results in a second level translation look-aside buffer (TLB2). The TLB2 is located on the XU. The XU may then send a PXLO result back to the central processor. However, this approach may have several drawbacks. For example, access to the XU is relatively slow, as the XU is located physically further away from the central processor than execution pipelines. Moreover, the SAA is not stored a first level translation look-aside buffer (TLB1) located on the central processor. Because the SAA is not stored in the TLB1, the TLB1 may indicate a miss if a storage location is later accessed by a data cache (D-cache), and the exact same virtual to absolute address translation request that was performed for the PXLO instruction is sent to the XU again. The exact same translation request may be sent relatively often, as the storage location needs to be tested for access exceptions before the SAA is provided to the accelerator.